\doxysubsubsubsection{UART Driver Enable Assertion Time LSB Position In CR1 Register }
\hypertarget{group___u_a_r_t___c_r1___d_e_a_t___a_d_d_r_e_s_s___l_s_b___p_o_s}{}\label{group___u_a_r_t___c_r1___d_e_a_t___a_d_d_r_e_s_s___l_s_b___p_o_s}\index{UART Driver Enable Assertion Time LSB Position In CR1 Register@{UART Driver Enable Assertion Time LSB Position In CR1 Register}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___c_r1___d_e_a_t___a_d_d_r_e_s_s___l_s_b___p_o_s_ga90d12dcdf8fd18f3be92d9699abe02cd}{UART\+\_\+\+CR1\+\_\+\+DEAT\+\_\+\+ADDRESS\+\_\+\+LSB\+\_\+\+POS}}~21U
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___u_a_r_t___c_r1___d_e_a_t___a_d_d_r_e_s_s___l_s_b___p_o_s_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___u_a_r_t___c_r1___d_e_a_t___a_d_d_r_e_s_s___l_s_b___p_o_s_ga90d12dcdf8fd18f3be92d9699abe02cd}\index{UART Driver Enable Assertion Time LSB Position In CR1 Register@{UART Driver Enable Assertion Time LSB Position In CR1 Register}!UART\_CR1\_DEAT\_ADDRESS\_LSB\_POS@{UART\_CR1\_DEAT\_ADDRESS\_LSB\_POS}}
\index{UART\_CR1\_DEAT\_ADDRESS\_LSB\_POS@{UART\_CR1\_DEAT\_ADDRESS\_LSB\_POS}!UART Driver Enable Assertion Time LSB Position In CR1 Register@{UART Driver Enable Assertion Time LSB Position In CR1 Register}}
\doxysubsubsubsubsubsection{\texorpdfstring{UART\_CR1\_DEAT\_ADDRESS\_LSB\_POS}{UART\_CR1\_DEAT\_ADDRESS\_LSB\_POS}}
{\footnotesize\ttfamily \label{group___u_a_r_t___c_r1___d_e_a_t___a_d_d_r_e_s_s___l_s_b___p_o_s_ga90d12dcdf8fd18f3be92d9699abe02cd} 
\#define UART\+\_\+\+CR1\+\_\+\+DEAT\+\_\+\+ADDRESS\+\_\+\+LSB\+\_\+\+POS~21U}

UART Driver Enable assertion time LSB position in CR1 register 